This software requires the following for full functionality:

• Keysight D9010SCNA/D9020SCNA - InfiniiScan Event Identification Software

This item is a perpetual license for the D9020DDRC software package. Support options for this package are listed in the accessories section of this page.

Types of perpetual licenses

There are five variations of the perpetual license listed in the menu above – they are as follows:

• Floating
• Networked instruments/computers can access a license from a server one at a time. Multiple licenses may be purchased for concurrent usage.

• Single site: 1-mile radius from the server

• Single region: North, Central, and South America, Canada

• Node locked
• License can be used on one specified instrument/computer
• Transportable
• License can be used on one instrument/computer at a time but may be transferred to another using Keysight Software Manager (internet connection required)
• USB Portable
• License can be used on one instrument/computer at a time but can be transferred to another using a certified USB dongle (available for additional purchase, Keysight part number E8900-D10).

D9020DDRC Information

The Keysight DDR2 and LPDDR2 compliance test applications provide a fast and easy way to test, debug, and characterize DDR2 and LPDDR2 designs. The tests performed by the DDR2 compliance test software are based on the JEDEC DDR2 SDRAM specification, the tests performed by the LPDDR2 compliance test software are based on the JEDEC LPDDR2 Specification. In addition, both the DDR2 and LPDDR2 test application features Custom mode, which covers crucial measurements such as eye-diagram, mask testing, ringing, and other tests that are not covered in the specifications but are critical for characterizing DDR2 and LPDDR2 devices. The test application offers a user-friendly setup wizard and a comprehensive report that includes margin analysis.

D9020DDRC Software Highlights

• Compliance testing of clock jitter, electrical and timing measurements in accordance to JEDEC specifications
• Superior signal integrity and probing that meets DDR2 and LPDDR2 measurement needs.
• JEDEC test measurement with navigation capability for DDR debug
• Statistical analysis of reading or writing data for margin testing
• Data analytics capabilities include data import into the data repository server and aggregate test results viewing
• Setup wizard for quick setup, configuration and test selection
• Test framework that reports multi-trial results with the full array of statistics for each measurement with worst-case measurement result